Voltage divider circuit - stability factor (Sv)

We are going to catch "Sv"  for voltage divider circuit. "Sv" indicates a stability factor used to discuss stabilization of the circuit during variations in Ic with respect to VBE .  Before starting, it's better to take a trip through Stability factor 'S' for voltage divider circuit . Also for getting more idea about stabilization and stability factors, plz visit Stability factors & Biasing circuits .

Stability factor (Sv)

Stability factor indicates the stability of the circuit which is under discussion. Stability means variations in operating point(mainly Ic). To find 'Which are the main components in the circuit that affects stability?' -we always depends upon the equation for the stability factor. Once we get it, we can easily find the components affecting stability and it will then lead us to 'different ways for increasing stability'.
Consider the Thevenin equivalent  for Voltage divider circuit. A detailed description is given in the post Voltage divider bias - Stability factor 'S'. For convenience i am including Thevenin's equivalent of input side of voltage divider circuit(fig 1).

fig 1

 On writing loop equation, we will get as,

Voltage divider bias - Stability factor 'S'(Stabilization in voltage divider circuit)

Various biasing circuits are designed for amplifiers(a refreshment is provided here). One which is familiar to you is Voltage divider bias, also known as Self bias. Here, we are discussing about various stability factors in self bias.

First, consider diagram for voltage divider bias :

fig 1

This is the commonly used biasing circuit as it provides good bias stability. It is connected in Common Emitter configuration. In order to connect as an amplifier, Emitter-base junction is to be