Sunday 31 August 2014

Clamper


 The word Clamp means 'to hold things together or fasten two things together'. In electronics it means 'hold voltage level of a wave at a particular value which is different from its normal.

Clamping circuit is used to shifts a signal by a dc voltage. How it is possible to shift a sine wave?

Fig a


This dc level shifting is explained in Fig a. Dc level of  sine wave (leftmost figure) is at zero volt. Sine waves having dc level at +2v and dc level at -2v are followed. A clamping circuit can be used for this purpose. 

Clamper circuits -section I

A simple clamping circuit is given below in fig 1. The circuit consists of a capacitor and a diode. Across the diode output voltage is taking. Here the capacitor act as a battery(Capacitor has a charge storing capability and thus can be act as a cell. At the first instant of switching on the circuit, capacitor is charged to maximum value of input voltage(Vm). It will maintain this voltage in it until the input is switched off). In fig 1, positive side of the diode is at the top side and so leftmost plate  of the capacitor is positive(current direction through the diode is from top to bottom and that in capacitor is from left to right - so left plate is taken as positive. Since right plate is negative, donation to output voltage by the capacitor is negative).
fig 1
To get an idea about how the output is obtained, keep these two things in mind:
1.During positive half cycle of input voltage, diode is forward biased and no input voltage is dropped across diode(so no donation to output voltage by diode). But our capacitor battery is there, and its voltage(Vc) is equal to maximum value of input sine wave(Vm). Then have a look into voltages in the circuit.

 Positive half cycle of the input sine wave is shown with Vm=10v, its polarity is also indicated. Capacitor is charged to 10v with polarity as shown. Since diode is forward biased it is represented with a small forward resistance. Output voltage is taking across points 'a' and 'd'(Vad). Vad = Voltage across 'abcd' =  -Vm+Vin = -10v+ Vin. (Vin is varying from 0 to +10 then to 0). So -10v +Vin will be as follows:

                                                This is how the output in fig 1 is obtained during positive half of input.

2. During negative half cycle of input, diode is in reverse bias and it will behave as an open circuit.

Now have a look into polarities of input voltage and capacitor. Since capacitor charges only during the positive half cycle of input sine wave, polarity is same. But because of negative half cycle of input, polarity of Vin is reversed. Output voltage is taken across points 'a ' and 'd' (Vad). Vad = Voltage acrosss 'abcd' =  -Vm -Vin  =  -10v -Vin. 
This explanation is only for keeping in your mind, don't pour it into your papers. Only one thing you need to do is --- assign a polarity for the capacitor according to forward bias condition of diode. If  -ve polarity is nearer to diode, keep in mind that output will be in the -ve side of Y axis. Keeping circuit of fig 1 in mind, it is easy to find outputs of fig 2 and fig3. Lets see..
fig 2




 Compare outputs of fig 1 and fig 2. If output of fig 1 is slightly shift towards top we will get output of fig 2. This shift is because of the presence of positive cell voltage Vr.
fig 3
Similarly if we shift the output of fig 1 towards bottom, output of fig 3 will be obtained. This is due to negative battery voltage Vr attached to the diode.

Clamper circuits - Section II

It is easy to diegest  the remaining circuits if we relate them to that in section I. Just reverse the direction of diode in fig 1, then look below. Yaa, next circuit.
fig 4
 With the reversal of diode, don't forget to reverse the polarity of capacitor - here current direction through the capacitor is taken from right plate to left plate. A tip to remember - if the capacitor plate nearer to the diode is positive then output wave will be in the positive side of y axis.

Follow the same route of transition from fig 1 to fig 2, for fig 4 to fig 5..

fig 5

 When a  positive bias is introduced into fig 4, we get fig 5 and waveform shifts up.

Then again find an old route, that is from fig 1 to fig 3 and follow it for fig 4 to fig 6.

fig 6
With an extra negative bias in fig 6 compared to fig 4, waveform shifts down.



Easy???

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